1. Field of the Invention
The present invention generally relates to metrology apparatus for measuring features of surfaces and, more particularly, to features formed on or in a semiconductor wafer during semiconductor device or integrated circuit manufacture.
2. Description of the Prior Art
Issues of performance, functionality, cost and manufacturing yield have driven the development of higher densities of integration of semiconductor electronic devices and smaller minimum feature size regimes. At the same time, more complex structures for electronic elements therein have been developed to maintain adequate electrical characteristics and, in many cases, improve performance. Much the same requirements are necessary in other types of devices, as well, such as so-called micro-machines or nano-machines. Under such stringent requirements, it is imperative to confirm that at least critical dimensions of structures formed by various manufacturing processes conform to sophisticated designs and specifications using measurements of extremely high dimensional accuracy.
Numerous methods have been developed for inspecting the results of processes for forming very small structures which cannot be resolved by optical microscopy. For example, various techniques of scanning electron microscopy have been an industry standard in semiconductor manufacture for many years. Unfortunately, such techniques for observation of many structures are inherently destructive, particularly as applied to delicate electronic structures, and thus cannot confirm proper formation of structures at intermediate points in manufacture of a device which will eventually become operable.
Non-destructive testing or measurement of dimensions which cannot be resolved using optical microscopy generally requires probing of the structure and detection of contact of the probe and a structure surface. Such a technique is known as atomic force microscopy (AFM) in which a force imposed on the probe through contact with a surface of interest causes a change in the frequency of a vibration propagated through the probe. However, measurement of a trench-like or recessed structure or aperture requires use of a probe of smaller dimensions than the feature of interest. Probes of such small dimensions (e.g. less than 100 nm transverse dimension) have been developed and are currently in use although probes developed to date are difficult to fabricate and have dimensions and forms which limit the types of structures which can be measured.
For example, one known probe tip is shown in FIGS. 1A and 1B which show profiles of such a probe derived through scanning electron microscopy. As illustrated, this probe has a relatively low aspect ratio (less than 3:1) and slightly varying transverse dimensions (all slightly less than 100 nm) over its length and is thus generally slightly frustro-conical in shape or slightly barrel-shaped (e.g. the transverse dimension at a mid-point of the probe length being slightly larger than at the tip); forming a slightly boot-shaped overall cross-section) which is useful for measurement of slight recesses in trench-like structures (e.g. where the bottom of the trench may be slightly larger than at the top or surface from which the trench-like structure is formed) such as trenches, nested lines, nested spaces, contacts, line ends, space ends and the like which are relatively common in some semiconductor devices but may represent defects in other structures (e.g. where an etchant undercuts a resist). It can be readily appreciated, however, that a recess is a critical dimension but where measurement may be difficult. For example, in the probe illustrated in FIGS. 1A and 1B, the maximum recess which could be measured would be limited to about 5-6 nm and then only at a partial depth of the structure but not at the bottom thereof. Further, material strength limits the degree to which the probe width can be reduced and such probes will not be usable in foreseeable minimum feature size regimes. The possibility of developing relatively wider probe tips on narrower probe structures similar to that shown in FIG. 1C is currently projected to be about nine months behind current semiconductor manufacturing industry needs for current device designs.